3 papers
cs.ET2025
CMOS 2.0 -- Redefining the Future of Scaling
Moritz Brunion, Navaneeth Kunhi Purayil, Francesco Dell'Atti +5
We propose to revisit the functional scaling paradigm by capitalizing on two recent developments in advanced chip manufacturing, namely 3D wafer bonding and backside processing. Th…
cs.AR2025
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes
Lorenzo Ruotolo, Lara Orlandic, Pengbo Yu +8
This paper presents the physical design exploration of a domain-specific processor (DSIP) architecture targeted at machine learning (ML), addressing the challenges of interconnect…
cs.ET2025
Thermal Implications of Non-Uniform Power in BSPDN-Enabled 2.5D/3D Chiplet-based Systems-in-Package using Nanosheet Technology
Yukai Chen, Massimiliano Di Todaro, Bjorn Vermeersch +5
Advances in nanosheet technologies have significantly increased power densities, exacerbating thermal management challenges in 2.5D/3D chiplet-based Systems-in-Package (SiP). While…