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20152025
most citedA Reconfigurable Vector Instruction Processor for Accelerating a Convection Parametrization Model on FPGAs

7 citations · 15 across the 8 of their papers we have counts for

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Showing 2023 · cs.DCShow all

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cs.DC2023

Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level Synthesis

Robert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede

Dynamically scheduled high-level synthesis (HLS) achieves higher throughput than static HLS for codes with unpredictable memory accesses and control flow. However, excessive datafl…