activity
20142023
most citedThe Influence of Malloc Placement on TSX Hardware Transactional Memory

13 citations · 40 across the 14 of their papers we have counts for

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7 papers · 1 filter

cs.OS2020★ 4 cited

Scalable Range Locks for Scalable Address Spaces and Beyond

Alex Kogan, Dave Dice, Shady Issa

Range locks are a synchronization construct designed to provide concurrent access to multiple threads (or processes) to disjoint parts of a shared resource. Originally conceived in…

cs.OS2020

Fissile Locks

Dave Dice, Alex Kogan

Classic test-and-test (TS) mutual exclusion locks are simple, and enjoy high performance and low latency of ownership transfer under light or no contention. However, they do not sc…

cs.OS2019★ 2 cited

Avoiding Scalability Collapse by Restricting Concurrency

Dave Dice, Alex Kogan

Saturated locks often degrade the performance of a multithreaded application, leading to a so-called scalability collapse problem. This problem arises when a growing number of thre…

cs.OS2018

Compact NUMA-Aware Locks

Dave Dice, Alex Kogan

Modern multi-socket architectures exhibit non-uniform memory access (NUMA) behavior, where access by a core to data cached locally on a socket is much faster than access to data ca…

cs.OS2018★ 1 cited

TWA -- Ticket Locks Augmented with a Waiting Array

Dave Dice, Alex Kogan

The classic ticket lock consists of ticket and grant fields. Arriving threads atomically fetch-and-increment ticket and then wait for grant to become equal to the value returned by…

cs.OS2018★ 5 cited

BRAVO -- Biased Locking for Reader-Writer Locks

David Dice, Alex Kogan

Designers of modern reader-writer locks confront a difficult trade-off related to reader scalability. Locks that have a compact memory representation for active readers will typica…

cs.OS2015★ 13 cited

The Influence of Malloc Placement on TSX Hardware Transactional Memory

Dave Dice, Tim Harris, Alex Kogan +1

The hardware transactional memory (HTM) implementation in Intel's i7-4770 "Haswell" processor tracks the transactional read-set in the L1 (level-1), L2 (level-2) and L3 (level-3) c…