3 papers
cs.CC2025
Bounded Dynamic Level Maintenance for Efficient Logic Optimization
Junfeng Liu, Qinghua Zhao, Liwei Ni +5
Logic optimization constitutes a critical phase within the Electronic Design Automation (EDA) flow, essential for achieving desired circuit power, performance, and area (PPA) targe…
cs.AR2025
A Systematic Approach for Multi-objective Double-side Clock Tree Synthesis
Xun Jiang, Haoran Lu, Yuxuan Zhao +8
As the scaling of semiconductor devices nears its limits, utilizing the back-side space of silicon has emerged as a new trend for future integrated circuits. With intense interest,…
cs.NE2025
Evolution of Optimization Algorithms for Global Placement via Large Language Models
Xufeng Yao, Jiaxi Jiang, Yuxuan Zhao +3
Optimization algorithms are widely employed to tackle complex problems, but designing them manually is often labor-intensive and requires significant expertise. Global placement is…