63 citations · 287 across the 24 of their papers we have counts for
7 papers · 1 filter
Enable Lightweight and Precision-Scalable Posit/IEEE-754 Arithmetic in RISC-V Cores for Transprecision Computing
Qiong Li, Chao Fang, Longwei Huang +2
While posit format offers superior dynamic range and accuracy for transprecision computing, its adoption in RISC-V processors is hindered by the lack of a unified solution for ligh…
SPEED: A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference
Chuanning Wang, Chao Fang, Xiao Wu +2
Deploying deep neural networks (DNNs) on those resource-constrained edge platforms is hindered by their substantial computation and storage demands. Quantized multi-precision DNNs,…
An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes
Miaoxin Wang, Xiao Wu, Jun Lin +1
Convolutional neural networks (CNNs) with large kernels, drawing inspiration from the key operations of vision transformers (ViTs), have demonstrated impressive performance in vari…
A Scalable RISC-V Vector Processor Enabling Efficient Multi-Precision DNN Inference
Chuanning Wang, Chao Fang, Xiao Wu +2
RISC-V processors encounter substantial challenges in deploying multi-precision deep neural networks (DNNs) due to their restricted precision support, constrained throughput, and s…
A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge
Longwei Huang, Chao Fang, Qiong Li +2
Extreme edge platforms, such as in-vehicle smart devices, require efficient deployment of quantized deep neural networks (DNNs) to enable intelligent applications with limited amou…
A High Throughput List Decoder Architecture for Polar Codes
Jun Lin, Chenrong Xiong, Zhiyuan Yan
While long polar codes can achieve the capacity of arbitrary binary-input discrete memoryless channels when decoded by a low complexity successive cancelation (SC) algorithm, the e…