3 papers
cs.AR2018
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM based FPGA
Swagata Mandal, Sreetama Sarkar, Wong Ming Ming +2
Efficient low complexity error correcting code(ECC) is considered as an effective technique for mitigation of multi-bit upset (MBU) in the configuration memory(CM)of static random…
cs.AR2015
FPGA based Novel High Speed DAQ System Design with Error Correction
Swagata Mandal, Suman Sau, Amlan Chakrabarti +3
Present state of the art applications in the area of high energy physics experiments (HEP), radar communication, satellite communication and bio medical instrumentation require fau…
physics.ins-det2015
FPGA based High Speed Data Acquisition System for High Energy Physics Application
Swagata Mandal, Suman Sau, Amlan Chakrabarti +1
In high energy physics experiments (HEP), high speed and fault resilient data communication is needed between detectors/sensors and the host PC. Transient faults can occur in the c…