Development of a new high-speed data acquisition system prototype for SOI pixel detector using SiTCP-XG, a 10-gigabit Ethernet network processor

Ryutaro Nishimura, Shunji Kishimoto, Yasuo Arai +1

We are developing a new readout board with a newer generation field-programmable gate array (FPGA) and the 10-gigabit ethernet to improve the performance and usability of the curre…