2 papers
cond-mat.mtrl-sci2025
Channel-last gate-all-around nanosheet oxide semiconductor transistors
Fabia F. Athena, Xiangjin Wu, Nathaniel S. Safron +18
As we move beyond the era of transistor miniaturization, back-end-of-line-compatible transistors that can be stacked monolithically in the third dimension promise improved performa…
cond-mat.mtrl-sci2025
Gate Dielectric Engineering with an Ultrathin Silicon-oxide Interfacial Dipole Layer for Low-Leakage Oxide-Semiconductor Memories
Fabia F. Athena, Jonathan Hartanto, Matthias Passlack +11
We demonstrate a gate dielectric engineering approach leveraging an ultrathin, atomic layer deposited (ALD) silicon oxide interfacial layer (SiL) between the amorphous oxide semico…