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researcher

Ming-Shiang Lai

1 paper hereh-index 6201 citations42 works total

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author position
  • middle author1

Across the 1 of 1 paper where every author was matched, so the position is known.

fields
  • cs.ET1

identity via Semantic Scholar / OpenAlex

collaborators

1 paper

cs.ET2026

CXL-DMSim: A Full-System CXL Disaggregated Memory Simulator With Comprehensive Silicon Validation

Yanjing Wang, Lizhou Wu, Wentao Hong +9

Compute eXpress Link (CXL) has emerged as a key enabler of memory disaggregation for future heterogeneous computing systems to expand memory on-demand and improve resource utilizat…

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