30 citations · 101 across the 20 of their papers we have counts for
Showing 2017Show all
2 papers · 1 filter
cs.DC2017★ 12 cited
A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs
Andreas Weichslgartner, Stefan Wildermann, Deepak Gangadharan +2
Executing multiple applications on a single MPSoC brings the major challenge of satisfying multiple quality requirements regarding real-time, energy, etc. Hybrid application mappin…
cs.AR2017★ 3 cited
Optimizing Scrubbing by Netlist Analysis for FPGA Configuration Bit Classification and Floorplanning
Bernhard Schmidt, Daniel Ziener, Jürgen Teich +1
Existing scrubbing techniques for SEU mitigation on FPGAs do not guarantee an error-free operation after SEU recovering if the affected configuration bits do belong to feedback loo…