2 papers
cs.AR2026
RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory
Nika Mansouri Ghiasi, Mohammad Sadrosadati, Geraldo F. Oliveira +11
Recent nano-technological advances enable the Monolithic 3D (M3D) integration of multiple memory and logic layers in a single chip, allowing for fine-grained connections between la…
cs.AR2024
Accelerating Time Series Analysis via Processing using Non-Volatile Memories
Ivan Fernandez, Christina Giannoula, Aditya Manglik +6
Time Series Analysis (TSA) is a critical workload to extract valuable information from collections of sequential data, e.g., detecting anomalies in electrocardiograms. Subsequence…