3 papers
cs.CV2026
A Parameterizable Convolution Accelerator for Embedded Deep Learning Applications
Panagiotis Mousouliotis, Georgios Keramidas
Convolutional neural network (CNN) accelerators implemented on Field-Programmable Gate Arrays (FPGAs) are typically designed with a primary focus on maximizing performance, often m…
cs.LG2026
Optimizing Tensor Train Decomposition in DNNs for RISC-V Architectures Using Design Space Exploration and Compiler Optimizations
Theologos Anthimopoulos, Milad Kokhazadeh, Vasilios Kelefouras +2
Deep neural networks (DNNs) have become indispensable in many real-life applications like natural language processing, and autonomous systems. However, deploying DNNs on resource-c…
cs.AR2025
Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project
Giovanni Agosta, Stefano Cherubin, Derek Christ +11
ARCHYTAS aims to design and evaluate non-conventional hardware accelerators, in particular, optoelectronic, volatile and non-volatile processing-in-memory, and neuromorphic, to tac…