collaborators

5 papers

cs.SE2026

Semantic Consensus Decoding: Backdoor Defense for Verilog Code Generation

Guang Yang, Xing Hu, Xiang Chen +1

Large language models (LLMs) for Verilog code generation are increasingly adopted in hardware design, yet remain vulnerable to backdoor attacks where adversaries inject malicious t…

cs.AR2025

Large Language Model for Verilog Code Generation: Literature Review and the Road Ahead

Guang Yang, Wei Zheng, Xiang Chen +14

Code generation has emerged as a critical research area at the intersection of Software Engineering (SE) and Artificial Intelligence (AI), attracting significant attention from bot…

cs.AR2025

The Cream Rises to the Top: Efficient Reranking Method for Verilog Code Generation

Guang Yang, Wei Zheng, Xiang Chen +3

LLMs face significant challenges in Verilog generation due to limited domain-specific knowledge. While sampling techniques improve pass@k metrics, hardware engineers need one trust…

cs.SE2025

CODE-DITING: A Reasoning-Based Metric for Functional Alignment in Code Evaluation

Guang Yang, Yu Zhou, Xiang Chen +5

Trustworthy evaluation methods for code snippets play a crucial role in neural code generation. Traditional methods, which either rely on reference solutions or require executable…

cs.CR2025

Defending Code Language Models against Backdoor Attacks with Deceptive Cross-Entropy Loss

Guang Yang, Yu Zhou, Xiang Chen +4

Code Language Models (CLMs), particularly those leveraging deep learning, have achieved significant success in code intelligence domain. However, the issue of security, particularl…