3 papers
cs.SE2026
Semantic Consensus Decoding: Backdoor Defense for Verilog Code Generation
Guang Yang, Xing Hu, Xiang Chen +1
Large language models (LLMs) for Verilog code generation are increasingly adopted in hardware design, yet remain vulnerable to backdoor attacks where adversaries inject malicious t…
cs.AR2025
The Cream Rises to the Top: Efficient Reranking Method for Verilog Code Generation
Guang Yang, Wei Zheng, Xiang Chen +3
LLMs face significant challenges in Verilog generation due to limited domain-specific knowledge. While sampling techniques improve pass@k metrics, hardware engineers need one trust…
cs.LG2025
Resource-Efficient Automatic Software Vulnerability Assessment via Knowledge Distillation and Particle Swarm Optimization
Chaoyang Gao, Xiang Chen, Jiyu Wang +2
The increasing complexity of software systems has led to a surge in cybersecurity vulnerabilities, necessitating efficient and scalable solutions for vulnerability assessment. Howe…