4 citations · 4 across the 3 of their papers we have counts for
3 papers
Empowering Vector Architectures for ML: The CAMP Architecture for Matrix Multiplication
Mohammadreza Esmali Nojehdeh, Hossein Mokhtarnia, Julian Pavon Rivera +7
This study presents the Cartesian Accumulative Matrix Pipeline (CAMP) architecture, a novel approach designed to enhance matrix multiplication in Vector Architectures (VAs) and Sin…
Floating Point HUB Adder for RISC-V Sargantana Processor
Gerardo Bandera, Javier Salamero, Miquel Moreto +1
HUB format is an emerging technique to improve the hardware and time requirement when round to nearest is needed. On the other hand, RISC-V is an open-source ISA that many companie…
Adaptive and application dependent runtime guided hardware prefetcher reconfiguration on the IBM POWER7
David Prat, Cristobal Ortega, Marc Casas +2
Hardware data prefetcher engines have been extensively used to reduce the impact of memory latency. However, microprocessors' hardware prefetcher engines do not include any automat…