9 citations · 10 across the 3 of their papers we have counts for
3 papers
Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder
Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu +3
This paper summarizes the design of a programmable processor with transport triggered architecture (TTA) for decoding LDPC and turbo codes. The processor architecture is designed i…
A Customized Lattice Reduction Multiprocessor for MIMO Detection
Shahriar Shahabuddin, Janne Janhunen, Amanullah Ghazi +2
Lattice reduction (LR) is a preprocessing technique for multiple-input multiple-output (MIMO) symbol detection to achieve better bit error-rate (BER) performance. In this paper, we…
Design of a Transport Triggered Architecture Processor for Flexible Iterative Turbo Decoder
Shahriar Shahabuddin, Janne Janhunen, Markku Juntti
In order to meet the requirement of high data rates for the next generation wireless systems, the efficient implementation of receiver algorithms is essential. On the other hand, t…