cwe hierarchy 1hardware security verification 1large language models 1rtl bug detection 1systemverilog assertions 1
From the 1 of 3 linked papers with an AI index.
3 papers
cs.CR2026
CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation
Xiao Tan, Cynthia Sturton
CHARGE is an automated framework that uses CWE hierarchies and large language models to generate SystemVerilog assertions for unverified RTL modules, enabling security property inf…
cs.AR2025
HeatSense: Intelligent Thermal Anomaly Detection for Securing NoC-Enabled MPSoCs
Mahdi Hasanzadeh, Kasem Khalil, Cynthia Sturton +1
Multi-Processor System-on-Chips (MPSoCs) are highly vulnerable to thermal attacks that manipulate dynamic thermal management systems. To counter this, we propose an adaptive real-t…
cs.CR2024
Security Properties for Open-Source Hardware Designs
Jayden Rogers, Niyaz Shakeel, Divya Mankani +4
The hardware security community relies on databases of known vulnerabilities and open-source designs to develop formal verification methods for identifying hardware security flaws.…