3 papers
cs.AR2026
CktEvo: Repository-Level RTL Code Benchmark for Design Evolution
Zhengyuan Shi, Jingxin Wang, Tairan Cheng +3
Register-Transfer Level (RTL) coding is an iterative, repository-scale process in which Power, Performance, and Area (PPA) emerge from interactions across many files and the downst…
cs.ET2026
GNN-based Path-aware multi-view Circuit Learning for Technology Mapping
Wentao Jiang, Jingxin Wang, Zhang Hu +5
Traditional technology mapping suffers from systemic inaccuracies in delay estimation due to its reliance on abstract, technology-agnostic delay models that fail to capture the nua…
cs.LG2025
Alignment Unlocks Complementarity: A Framework for Multiview Circuit Representation Learning
Zhengyuan Shi, Jingxin Wang, Wentao Jiang +5
Multiview learning on Boolean circuits holds immense promise, as different graph-based representations offer complementary structural and semantic information. However, the vast st…