activity
20242026
most citedCVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions

1 citations · 1 across the 1 of their papers we have counts for

collaborators

6 papers

cs.AR20261 cited

CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions

Simone Manoni, Emanuele Parisi, Riccardo Tedeschi +3

This work presents the first design, integration, and evaluation of the standard RISC-V extensions for Control-Flow Integrity (CFI). The Zicfiss and Zicfilp extensions aim at prote…

eess.SP2026

Safe-NEureka: a Hybrid Modular Redundant DNN Accelerator for On-board Satellite AI Processing

Riccardo Tedeschi, Luigi Ghionda, Alessandro Nadalini +5

Low Earth Orbit (LEO) constellations are revolutionizing the space sector, with on-board Artificial Intelligence (AI) becoming pivotal for next-generation satellites. AI accelerati…

cs.AR2025

Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution

Zexin Fu, Riccardo Tedeschi, Gianmarco Ottavi +4

Open-source RISC-V cores are increasingly demanded in domains like automotive and space, where achieving high instructions per cycle (IPC) through superscalar and out-of-order (OoO…

cs.AR2025

CVA6S+: A Superscalar RISC-V Core with High-Throughput Memory Architecture

Riccardo Tedeschi, Gianmarco Ottavi, Côme Allart +11

Open-source RISC-V cores are increasingly adopted in high-end embedded domains such as automotive, where maximizing instructions per cycle (IPC) is becoming critical. Building on t…

cs.AR2025

Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing

Mattia Sinigaglia, Amirhossein Kiamarzi, Marco Bertuletti +11

Most Wearable Ultrasound (WUS) devices lack the computational power to process signals at the edge, instead relying on remote offload, which introduces latency, high power consumpt…

eess.SY2024

Culsans: An Efficient Snoop-based Coherency Unit for the CVA6 Open Source RISC-V application processor

Riccardo Tedeschi, Luca Valente, Gianmarco Ottavi +6

Symmetric Multi-Processing (SMP) based on cache coherency is crucial for high-end embedded systems like automotive applications. RISC-V is gaining traction, and open-source hardwar…