activity
20122020
most citedCLAASIC: a Cortex-Inspired Hardware Accelerator

4 citations · 4 across the 5 of their papers we have counts for

collaborators

5 papers

cs.AR2020

Rainbow: A Composable Coherence Protocol for Multi-Chip Servers

Lucia G. Menezo, Valentin Puente, Jose A. Gregorio

The use of multi-chip modules (MCM) and/or multi-socket boards is the most suitable approach to increase the computation density of servers while keep chip yield attained. This pap…

cs.DC2019

Accuracy vs. Computational Cost Tradeoff in Distributed Computer System Simulation

Adrian Colaso, Pablo Prieto, Jose-Angel Herrero +3

Simulation is a fundamental research tool in the computer architecture field. These kinds of tools enable the exploration and evaluation of architectural proposals capturing the mo…

cs.ET2016★ 4 cited

CLAASIC: a Cortex-Inspired Hardware Accelerator

Valentin Puente, José Ángel Gregorio

This work explores the feasibility of specialized hardware implementing the Cortical Learning Algorithm (CLA) in order to fully exploit its inherent advantages. This algorithm, whi…

cs.AR2012

The Necessity for Hardware QoS Support for Server Consolidation and Cloud Computing

Javier Merino, Valentin Puente, José Ángel Gregorio

Chip multiprocessors (CMPs) are ubiquitous in most of today's computing fields. Although they provide noticeable benefits in terms of performance, cost and power efficiency, they a…

cs.AR2012

LOCKE Detailed Specification Tables

Lucia G. Menezo, Valentin Puente, Jose-Angel Gregorio

This document shows the detailed specification of LOCKE coherence protocol for each cache controller, using a table-based technique. This representation provides clear, concise vis…