5 papers
A Logic-Reuse Approach to Nibble-based Multiplier Design for Low Power Vector Computing
Md Rownak Hossain Chowdhury, Mostafizur Rahman
Vector multiplication is a fundamental operation for AI acceleration, responsible for over 85% of computational load in convolution tasks. While essential, these operations are pri…
Messaging-based Adaptive Vector Computing (MAVeC) Accelerator for AI Workloads
Md. Rownak Hossain Chowdhury, Mostafizur Rahman
The performance of AI accelerators is increasingly limited by data movement, memory access, and orchestration overheads rather than raw compute capability. This paper presents MAVe…
Hardware-Aware Data and Instruction Mapping for AI Tasks: Balancing Parallelism, I/O and Memory Tradeoffs
Md Rownak Hossain Chowdhury, Mostafizur Rahman
We introduce a mapping framework for deep learning inference that takes advantage of predictable neural network behavior to plan both computation and communication ahead of time. T…
Demystifying the 7-D Convolution Loop Nest for Data and Instruction Streaming in Reconfigurable AI Accelerators
Md Rownak Hossain Chowdhury, Mostafizur Rahman
Convolution remains the most compute-intensive operation in AI acceleration, often constituting over 80-90% of the workload. Existing approaches in spatial architectures such as co…
Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture
Md Rownak Hossain Chowdhury, Mostafizur Rahman
Addressing the growing demands of artificial intelligence (AI) and data analytics requires new computing approaches. In this paper, we propose a reconfigurable hardware accelerator…