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cs.AR2026
A Thread-Register Decoupled GPU Execution Model for Efficient Tensor Computation
Zihan Liu, Jingwen Leng, Yangjie Zhou +12
Modern GPUs increasingly integrate Tensor Cores into the execution pipeline. Although aggregate tensor throughput continues to grow, aided by an operand supply that has evolved fro…
cs.AR2026
TOM: A Ternary Read-only Memory Accelerator for LLM-powered Edge Intelligence
Hongyi Guan, Yijia Zhang, Wenqiang Wang +4
The deployment of Large Language Models (LLMs) for real-time intelligence on edge devices is rapidly growing. However, conventional hardware architectures face a fundamental memory…
cs.AR2026
M2XFP: A Metadata-Augmented Microscaling Data Format for Efficient Low-bit Quantization
Weiming Hu, Zihan Zhang, Haoyan Zhang +8
Existing low-bit Microscaling (MX) formats, such as MXFP4, often suffer from substantial accuracy degradation due to the use of a shared scaling factor with the Power-of-Two format…