49 citations · 191 across the 35 of their papers we have counts for
3 papers · 1 filter
Scalable Test Generation to Trigger Rare Targets in High-Level Synthesizable IPs for Cloud FPGAs
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
High-Level Synthesis (HLS) has transformed the development of complex Hardware IPs (HWIP) by offering abstraction and configurability through languages like SystemC/C++, particular…
AgEncID: Aggregate Encryption Individual Decryption of Key for FPGA Bitstream IP Cores in Cloud
Mukta Debnath, Krishnendu Guha, Debasri Saha +1
Cloud computing platforms are progressively adopting Field Programmable Gate Arrays to deploy specialized hardware accelerators for specific computational tasks. However, the secur…
FuCE: Fuzzing+Concolic Execution guided Trojan Detection in Synthesizable Hardware Designs
Mukta Debnath, Animesh Basak Chowdhury, Debasri Saha +1
High-level synthesis (HLS) is the next emerging trend for designing complex customized architectures for applications such as Machine Learning, Video Processing. It provides a high…