2 papers
eess.SY2026
Signal Temporal Logic Verification and Synthesis Using Deep Reachability Analysis and Layered Control Architecture
Joonwon Choi, Kartik Anand Pant, Youngim Nam +3
We propose a signal temporal logic (STL)-based framework that rigorously verifies the feasibility of a mission described in STL and synthesizes control to safely execute it. The pr…
cs.RO2026
Track-centric Iterative Learning for Global Trajectory Optimization in Autonomous Racing
Youngim Nam, Jungbin Kim, Kyungtae Kang +1
This paper presents a global trajectory optimization framework for minimizing lap time in autonomous racing under uncertain vehicle dynamics. Optimizing the trajectory over the ful…