612 citations · 3.1k across the 120 of their papers we have counts for
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CIMinus: Empowering Sparse DNN Workloads Modeling and Exploration on SRAM-based CIM Architectures
Yingjie Qi, Jianlei Yang, Rubing Yang +5
Compute-in-memory (CIM) has emerged as a pivotal direction for accelerating workloads in the field of machine learning, such as Deep Neural Networks (DNNs). However, the effective…
An Event-Driven Spiking Compute-In-Memory Macro based on SOT-MRAM
Deyang Yu, Chenchen Liu, Chuanjie Zhang +2
The application of Magnetic Random-Access Memory (MRAM) in computing-in-memory (CIM) has gained significant attention. However, existing designs often suffer from high energy consu…
Finesse: An Agile Design Framework for Pairing-based Cryptography via Software/Hardware Co-Design
Tianwei Pan, Tianao Dai, Jianlei Yang +6
Pairing-based cryptography (PBC) is crucial in modern cryptographic applications. With the rapid advancement of adversarial research and the growing diversity of application requir…
HPIM: Heterogeneous Processing-In-Memory-based Accelerator for Large Language Models Inference
Cenlin Duan, Jianlei Yang, Rubing Yang +8
The deployment of large language models (LLMs) presents significant challenges due to their enormous memory footprints, low arithmetic intensity, and stringent latency requirements…
Efficient SRAM-PIM Co-design by Joint Exploration of Value-Level and Bit-Level Sparsity
Cenlin Duan, Jianlei Yang, Yikun Wang +7
Processing-in-memory (PIM) is a transformative architectural paradigm designed to overcome the Von Neumann bottleneck. Among PIM architectures, digital SRAM-PIM emerges as a promis…
CIMFlow: An Integrated Framework for Systematic Design and Evaluation of Digital CIM Architectures
Yingjie Qi, Jianlei Yang, Yiou Wang +6
Digital Compute-in-Memory (CIM) architectures have shown great promise in Deep Neural Network (DNN) acceleration by effectively addressing the "memory wall" bottleneck. However, th…