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20072023
most citedDemystifying CXL Memory with Genuine CXL-Ready Systems and Devices

131 citations · 326 across the 20 of their papers we have counts for

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8 papers · 1 filter

cs.AR2022

ORCA: A Network and Architecture Co-design for Offloading us-scale Datacenter Applications

Yifan Yuan, Jinghan Huang, Yan Sun +7

Responding to the "datacenter tax" and "killer microseconds" problems for datacenter applications, diverse solutions including Smart NIC-based ones have been proposed. Nonetheless,…

cs.AR2021★ 7 cited

Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution

Jie Zhang, Miryeong Kwon, Donghyun Gouk +4

Large persistent memories such as NVDIMM have been perceived as a disruptive memory technology, because they can maintain the state of a system even after a power failure and allow…

cs.AR2020

IOCA: High-Speed I/O-Aware LLC Management for Network-Centric Multi-Tenant Platform

Yifan Yuan, Mohammad Alian, Yipeng Wang +4

In modern server CPUs, last-level cache (LLC) is a critical hardware resource that exerts significant influence on the performance of the workloads, and how to manage LLC is a key…

cs.AR2019

Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic

Soroush Ghodrati, Hardik Sharma, Sean Kinzer +5

Low-power potential of mixed-signal design makes it an alluring option to accelerate Deep Neural Networks (DNNs). However, mixed-signal circuitry suffers from limited range for inf…

cs.AR2018

Amber: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources

Donghyun Gouk, Miryeong Kwon, Jie Zhang +5

SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-sys…

cs.AR2018

CIAO: Cache Interference-Aware Throughput-Oriented Architecture and Scheduling for GPUs

Jie Zhang, Shuwen Gao, Nam Sung Kim +1

A modern GPU aims to simultaneously execute more warps for higher Thread-Level Parallelism (TLP) and performance. When generating many memory requests, however, warps contend for l…