activity
20132022
most citedA Multi-objective Perspective for Operator Scheduling using Fine-grained DVS Architecture

2 citations · 6 across the 5 of their papers we have counts for

collaborators

6 papers

cs.PL2022

Static Analysis for AWS Best Practices in Python Code

Rajdeep Mukherjee, Omer Tripp, Ben Liblit +1

Amazon Web Services (AWS) is a comprehensive and broadly adopted cloud provider, offering over 200 fully featured services, including compute, database, storage, networking and con…

cs.FL2020★ 1 cited

Hardware/Software Co-verification Using Path-based Symbolic Execution

Rajdeep Mukherjee, Saurabh Joshi, John O'Leary +2

Conventional tools for formal hardware/software co-verification use bounded model checking techniques to construct a single monolithic propositional formula. Formulas generated in…

cs.LO2017★ 1 cited

Efficient Verification of Multi-Property Designs (The Benefit of Wrong Assumptions) (Extended Version)

Eugene Goldberg, Matthias Gudemann, Daniel Kroening +1

We consider the problem of efficiently checking a set of safety properties P1,....,Pk of one design. We introduce a new approach called JA-verification where JA stands for "Just-As…

cs.LO2017

Lifting CDCL to Template-based Abstract Domains for Program Verification

Rajdeep Mukherjee, Peter Schrammel, Leopold Haller +2

The success of Conflict Driven Clause Learning (CDCL) for Boolean satisfiability has inspired adoption in other domains. We present a novel lifting of CDCL to program analysis call…

cs.SE2016★ 2 cited

Equivalence Checking a Floating-point Unit against a High-level C Model (Extended Version)

Rajdeep Mukherjee, Saurabh Joshi, Andreas Griesmayer +2

Semiconductor companies have increasingly adopted a methodology that starts with a system-level design specification in C/C++/SystemC. This model is extensively simulated to ensure…

cs.OH2013★ 2 cited

A Multi-objective Perspective for Operator Scheduling using Fine-grained DVS Architecture

Rajdeep Mukherjee, Priyankar Ghosh, Pallab Dasgupta +1

The stringent power budget of fine grained power managed digital integrated circuits have driven chip designers to optimize power at the cost of area and delay, which were the trad…