2 papers
cs.AR2026
A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA
Neelesh Gupta, Peter Wang, Rajgopal Kannan +1
Gated DeltaNet (GDN) is a linear attention mechanism that replaces the growing KV cache with a fixed-size recurrent state. Hybrid LLMs like Qwen3-Next use 75% GDN layers and achiev…
cs.LG2025
Enabling Long FFT Convolutions on Memory-Constrained FPGAs via Chunking
Peter Wang, Neelesh Gupta, Viktor Prasanna
The need for long-context reasoning has led to alternative neural network architectures besides Transformers and self-attention, a popular model being Hyena, which employs causal 1…