collaborators

5 papers

eess.SP2026

Interlayer Error Calibration for Stacked Intelligent Metasurfaces:Modeling, Algorithms, and Future Perspectives

Xing Jia, Hao Liu, Haoxian Niu +3

Stacked intelligent metasurfaces (SIMs) have recently emerged as a key enabler for realizing electromagnetic wave-domain signal processing in next-generation wireless networks. How…

eess.SP2026

Bit-Efficient Quantisation for Two-Channel Modulo-Sampling Systems

Wenyi Yan, Zeyuan Li, Lu Gan +2

Two-channel modulo analog-to-digital converters (ADCs) enable high-dynamic-range signal sensing at the Nyquist rate per channel, but existing designs quantise both channel outputs…

eess.SP2025

Moduli Selection in Robust Chinese Remainder Theorem: Closed-Form Solutions and Layered Design

Wenyi Yan, Lu Gan, Hongqing Liu +1

We study the fundamental problem of \emph{moduli selection} in the Robust Chinese Remainder Theorem (RCRT), where each residue may be perturbed by a bounded error. Consider mod…

eess.SP2025

FPGA-Enabled Modulo ADC with x100 Dynamic-Range Expansion: Hardware Design and Performance Evaluation

Zeyuan Li, Wenyi Yan, Lu Gan +2

Conventional analog-to-digital converters (ADCs) fail to capture high-dynamic-range (HDR) signals due to clipping. Modulo ADCs circumvent this limitation by folding the input prior…

eess.SP2025

Difference-Based Recovery for Modulo Sampling: Tightened Bounds and Robustness Guarantees

Wenyi Yan, Zeyuan Li, Lu Gan +2

Conventional analog-to-digital converters (ADCs) clip when signals exceed their input range. Modulo (unlimited) sampling overcomes this limitation by folding the signal before digi…