8 papers
Rhea: a Framework for Fast Design and Validation of RTL Cache-Coherent Memory Subsystems
Davide Zoni, Andrea Galimberti, Adriano Guarisco
Designing and validating efficient cache-coherent memory subsystems is a critical yet complex task in the development of modern multi-core system-on-chip architectures. Rhea is a u…
OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generation
Giuseppe Chiari, Michele Piccoli, Davide Zoni
The automation of analog integrated circuit (IC) design remains a longstanding challenge, primarily due to the intricate interdependencies among physical layout, parasitic effects,…
A Benchmarking Platform for DDR4 Memory Performance in Data-Center-Class FPGAs
Andrea Galimberti, Gabriele Montanaro, Andrea Motta +2
FPGAs are increasingly utilized in data centers due to their capacity to exploit data parallelism in computationally intensive workloads. Furthermore, the processing of modern data…
An FPGA-Based Open-Source Hardware-Software Framework for Side-Channel Security Research
Davide Zoni, Andrea Galimberti, Davide Galli
Attacks based on side-channel analysis (SCA) pose a severe security threat to modern computing platforms, further exacerbated on IoT devices by their pervasiveness and handling of…
Blink: Fast Automated Design of Run-Time Power Monitors on FPGA-Based Computing Platforms
Andrea Galimberti, Michele Piccoli, Davide Zoni
The current over-provisioned heterogeneous multi-cores require effective run-time optimization strategies, and the run-time power monitoring subsystem is paramount for their succes…
Functional ISS-Driven Verification of Superscalar RISC-V Processors
Andrea Galimberti, Marco Vitali, Sebastiano Vittoria +1
A time-efficient and comprehensive verification is a fundamental part of the design process for modern computing platforms, and it becomes ever more important and critical to optim…