3 papers
cs.AR2026
Interconnect-Aware Logic Resynthesis for Multi-Die FPGAs
Xiaoke Wang, Raveena Raikar, Markus Rein +3
Multi-die FPGAs enable device scaling beyond reticle limits but introduce severe interconnect overhead across die boundaries. Inter-die connections, commonly referred to as super-l…
cs.AR2025
Hummingbird: A Smaller and Faster Large Language Model Accelerator on Embedded FPGA
Jindong Li, Tenglong Li, Ruiqi Chen +4
Deploying large language models (LLMs) on embedded devices remains a significant research challenge due to the high computational and memory demands of LLMs and the limited hardwar…
cs.AR2024
A Power-Efficient Hardware Implementation of L-Mul
Ruiqi Chen, Yangxintong Lyu, Han Bao +1
Multiplication is a core operation in modern neural network (NN) computations, contributing significantly to energy consumption. The linear-complexity multiplication (L-Mul) algori…