8 papers
e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
Simone Machetti, Pasquale Davide Schiavone, Lara Orlandic +4
Graphics processing units (GPUs) excel at parallel processing, but remain largely unexplored in ultra-low-power edge devices (TinyAI) due to their power and area limitations, as we…
Personalization on a Budget: Minimally-Labeled Continual Learning for Resource-Efficient Seizure Detection
Amirhossein Shahbazinia, Jonathan Dan, Jose A. Miranda +2
Objective: Epilepsy, a prevalent neurological disease, demands careful diagnosis and continuous care. Seizure detection remains challenging, as current clinical practice relies on…
A flexible framework for early power and timing comparison of time-multiplexed CGRA kernel executions
Maxime Henri Aspros, Juan Sapriza, Giovanni Ansaloni +1
At the intersection between traditional CPU architectures and more specialized options such as FPGAs or ASICs lies the family of reconfigurable hardware architectures, termed Coars…
X-HEEP: An Open-Source, Configurable and Extendible RISC-V Platform for TinyAI Applications
Simone Machetti, Pasquale Davide Schiavone, Giovanni Ansaloni +2
In this work, we present X-HEEP, an open-source, configurable, and extendible RISC-V platform for ultra-low-power edge applications (TinyAI). X-HEEP features the eXtendible Acceler…
Physical Design Exploration of a Wire-Friendly Domain-Specific Processor for Angstrom-Era Nodes
Lorenzo Ruotolo, Lara Orlandic, Pengbo Yu +8
This paper presents the physical design exploration of a domain-specific processor (DSIP) architecture targeted at machine learning (ML), addressing the challenges of interconnect…
Systolic Arrays and Structured Pruning Co-design for Efficient Transformers in Edge Systems
Pedro Palacios, Rafael Medina, Jean-Luc Rouas +2
Efficient deployment of resource-intensive transformers on edge devices necessitates cross-stack optimization. We thus study the interrelation between structured pruning and systol…