24 citations · 110 across the 17 of their papers we have counts for
18 papers
Architectural improvements and technological enhancements for the APEnet+ interconnect system
R. Ammendola, A. Biagioni, O. Frezza +9
The APEnet+ board delivers a point-to-point, low-latency, 3D torus network interface card. In this paper we describe the latest generation of APEnet NIC, APEnet v5, integrated in a…
GPU-based Real-time Triggering in the NA62 Experiment
R. Ammendola, A. Biagioni, P. Cretaro +17
Over the last few years the GPGPU (General-Purpose computing on Graphics Processing Units) paradigm represented a remarkable development in the world of computing. Computing for Hi…
NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface Card with GPUDirect Features
A. Lonardo, F. Ameli, R. Ammendola +14
While the GPGPU paradigm is widely recognized as an effective approach to high performance computing, its adoption in low-latency, real-time systems is still in its early stages. A…
NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems
Roberto Ammendola, Andrea Biagioni, Riccardo Fantechi +13
We implemented the NaNet FPGA-based PCI2 Gen2 GbE/APElink NIC, featuring GPUDirect RDMA capabilities and UDP protocol management offloading. NaNet is able to receive a UDP input da…
Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems
Roberto Ammendola, Andrea Biagioni, Ottorino Frezza +7
Modern Graphics Processing Units (GPUs) are now considered accelerators for general purpose computation. A tight interaction between the GPU and the interconnection network is the…
NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
R. Ammendola, A. Biagioni, O. Frezza +10
NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack pr…