2 papers
cs.AR2026
OPERA: OPamp Design by an Expert-Taught Reasoning Agent, from Specifications to Layout
Vishal Saxena, Soumyajit Mandal
Analog flows from specifications to a signed-off layout rarely run without manual iteration. Recent large language model (LLM) agents size circuits with optimizer loops over the de…
cs.AR2026
AnalogPortBench: Benchmarking LLMs on Analog Circuit Porting
Saeid Rajabi, Aly Moussa, Vishal Saxena +2
Analog circuit design still relies heavily on expert knowledge, and porting proven designs to new process nodes is a recurring bottleneck. As a lower supply reduces available volta…