From the 1 of 11 linked papers with an AI index.
11 papers
Forbench: Symbolic Simulation Helps Make Your Testbench More Formal
Ziyi Yang, Wenbin Che, Ziyue Zheng +2
Simulation remains the dominant approach in pre-silicon verification due to its ease of deployment and intuitive workflow. However, as simulation only explores a limited subset of…
A-IC3: Learning-Guided Adaptive Inductive Generalization for Hardware Model Checking
Xiaofeng Zhou, Guangyu Hu, Hongce Zhang +1
The paper introduces a lightweight machine‑learning framework that uses a multi‑armed bandit to dynamically select inductive generalization strategies within the IC3 hardware model…
Inverter Redistribution through Self-Dual and Self-Anti-Dual Function Transformation
Jingren Wang, Guangyu Hu, Shiju Lin +1
And-Inverter Graph (AIG)-based logic synthesis has been a cornerstone of digital design automation for several decades. While numerous optimization techniques have been developed f…
AutoINV: Automated Invariant Generation Framework for Formal Verification on High-Level Synthesis Designs
Xiaofeng Zhou, Linfeng Du, Guangyu Hu +3
High-level synthesis (HLS) transforms an algorithmic description of hardware from a higher abstraction (e.g., C/C++) into a register-transfer level (RTL) design, offering reduced d…
AutoPDR: Circuit-Aware Solver Configuration Prediction for Hardware Model Checking
Guangyu Hu, Chen Chen, Xiaofeng Zhou +3
Property Directed Reachability (PDR) is a powerful algorithm for formal verification of hardware and software systems, but its performance is highly sensitive to parameter configur…
LeGend: A Data-Driven Framework for Lemma Generation in Hardware Model Checking
Mingkai Miao, Guangyu Hu, Wei Zhang +1
Property checking of RTL designs is a central task in formal verification. Among available engines, IC3/PDR is a widely used backbone whose performance critically depends on induct…