3 citations · 4 across the 2 of their papers we have counts for
2 papers
cs.PL2015★ 1 cited
Lazy TSO Reachability
Ahmed Bouajjani, Georgel Calin, Egor Derevenetc +1
We address the problem of checking state reachability for programs running under Total Store Order (TSO). The problem has been shown to be decidable but the cost is prohibitive, na…
cs.LO2014★ 3 cited
Robustness against Power is PSPACE-complete
Egor Derevenetc, Roland Meyer
Power is a RISC architecture developed by IBM, Freescale, and several other companies and implemented in a series of POWER processors. The architecture features a relaxed memory mo…