most citedMaximum Error Modeling for Fault-Tolerant Computation using Maximum a posteriori (MAP) Hypothesis

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cs.ET2011

Hybrid CMOS-MQCA Logic Architectures using Multi-Layer Spintronic Devices

Jayita Das, Syed M. Alam, Srinath Rajaram +1

We present a novel hybrid CMOS-MQCA architecture using multi-layer Spintronic devices as computing elements. A feasibility study is presented with 22nm CMOS where new approaches fo…