most citedFault tolerant reversible logic synthesis: Carry look-ahead and carry-skip adders

47 citations · 141 across the 12 of their papers we have counts for

collaborators

14 papers

cs.AR2011

Quantum Cost Efficient Reversible BCD Adder for Nanotechnology Based Systems

Md. Saiful Islam, Mohd. Zulfiquar Hafiz, Zerina Begum

Reversible logic allows low power dissipating circuit design and founds its application in cryptography, digital signal processing, quantum and optical information processing. This…

cs.AR2010

Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates

Md. Saiful Islam, Muhammad Mahbubur Rahman, Zerina Begum +1

Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power…

cs.AR2010★ 6 cited

BSSSN: Bit String Swapping Sorting Network for Reversible Logic Synthesis

Md. Saiful Islam

In this paper, we have introduced the notion of UselessGate and ReverseOperation. We have also given an algorithm to implement a sorting network for reversible logic synthesis base…

cs.OH2010

Wrapper/TAM Co-Optimization and constrained Test Scheduling for SOCs Using Rectangle Bin Packing

Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Muhammad Rezaul Karim +2

This paper describes an integrated framework for SOC test automation. This framework is based on a new approach for Wrapper/TAM co-optimization based on rectangle packing consideri…

cs.OH2010★ 1 cited

Wrapper/TAM Co-Optimization and Test Scheduling for SOCs Using Rectangle Bin Packing Considering Diagonal Length of Rectangles

Md. Rafiqul Islam, Muhammad Rezaul Karim, Abdullah Al Mahmud +2

This paper describes an integrated framework for SOC test automation. This framework is based on a new approach for Wrapper/TAM co-optimization based on rectangle packing consideri…

cs.AR2010★ 4 cited

Sorting Network for Reversible Logic Synthesis

Md. Saiful Islam, Md. Rafiqul Islam, Abdullah Al Mahmud +1

In this paper, we have introduced an algorithm to implement a sorting network for reversible logic synthesis based on swapping bit strings. The algorithm first constructs a network…