5 papers
GaloisSAT: Differentiable Boolean Satisfiability Solving via Finite Field Algebra
Curie Kim, Carsten Portner, Mingju Liu +6
Boolean satisfiability (SAT) problem, the first problem proven to be NP-complete, has become a fundamental challenge in computational complexity, with widespread applications in op…
VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool
Chia-Tung Ho, Haoxing Ren, Brucek Khailany
Due to the growing complexity of modern Integrated Circuits (ICs), automating hardware design can prevent a significant amount of human error from the engineering process and resul…
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair
Mingjie Liu, Yun-Da Tsai, Wenfei Zhou +1
Despite the significant progress made in code generation with large language models, challenges persist, especially with hardware description languages such as Verilog. This paper…
Revisiting VerilogEval: A Year of Improvements in Large-Language Models for Hardware Code Generation
Nathaniel Pinckney, Christopher Batten, Mingjie Liu +2
The application of large-language models (LLMs) to digital hardware code generation is an emerging field, with most LLMs primarily trained on natural language and software code. Ha…
FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware
Minwoo Kang, Mingjie Liu, Ghaith Bany Hamad +2
The remarkable reasoning and code generation capabilities of large language models (LLMs) have spurred significant interest in applying LLMs to enable task automation in digital ch…