3 papers
cs.SE2026
UCAgent: An End-to-End Agent for Block-Level Functional Verification
Junyue Wang, Zhicheng Yao, Yan Pi +6
Functional verification remains a critical bottleneck in modern IC development cycles, accounting for approximately 70% of total development time in many projects. However, traditi…
cs.AR2026
Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
Juncheng Huo, Yunfan Gao, Xinxin Liu +4
As processor designs grow more complex, verification remains bottlenecked by slow software simulation and low-quality random test stimuli. Recent research has applied software fuzz…
cs.AR2026
TurboFuzz: FPGA Accelerated Hardware Fuzzing for Processor Agile Verification
Yang Zhong, Haoran Wu, Xueqi Li +4
Verification is a critical process for ensuring the correctness of modern processors. The increasing complexity of processor designs and the emergence of new instruction set archit…