5 citations · 5 across the 1 of their papers we have counts for
2 papers
cs.AR2026
Minimum RISC-V: Maximum FPGA Efficiency
Martin Langhammer, Bogdan Pasca, Gregg Baeckler
RISC-V processors are now widely available for FPGAs, with most FPGA vendors replacing their proprietary soft-CPU architectures with this instruction-set architecture (ISA). Althou…
cs.OH2014★ 5 cited
Tools and Techniques for Efficient High-Level System Design on FPGAs
Adrian J. Chung, Kathryn Cobden, Mark Jervis +2
In order for FPGAs to be successful outside traditional markets, tools which enable software programmers to achieve high levels of system performance while abstracting away the FPG…