most citedDesign of a Transport Triggered Architecture Processor for Flexible Iterative Turbo Decoder

9 citations · 11 across the 5 of their papers we have counts for

collaborators

5 papers

cs.DC20161 cited

Parallel Digital Predistortion Design on Mobile GPU and Embedded Multicore CPU for Mobile Transmitters

Kaipeng Li, Amanullah Ghazi, Chance Tarver +6

Digital predistortion (DPD) is a widely adopted baseband processing technique in current radio transmitters. While DPD can effectively suppress unwanted spurious spectrum emissions…

cs.IT2016

DoF Analysis in a Two-Layered Heterogeneous Wireless Interference Network

Meghana Bande, Venugopal Veeravalli, Antti Tolli +1

Degrees of freedom (DoF) is studied in the downlink of a heterogenous wireless network modeled as a two-layered interference network. The first layer of the interference network is…

cs.IT2015

Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoder

Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu +3

This paper summarizes the design of a programmable processor with transport triggered architecture (TTA) for decoding LDPC and turbo codes. The processor architecture is designed i…

cs.IT20151 cited

A Customized Lattice Reduction Multiprocessor for MIMO Detection

Shahriar Shahabuddin, Janne Janhunen, Amanullah Ghazi +2

Lattice reduction (LR) is a preprocessing technique for multiple-input multiple-output (MIMO) symbol detection to achieve better bit error-rate (BER) performance. In this paper, we…

cs.AR20159 cited

Design of a Transport Triggered Architecture Processor for Flexible Iterative Turbo Decoder

Shahriar Shahabuddin, Janne Janhunen, Markku Juntti

In order to meet the requirement of high data rates for the next generation wireless systems, the efficient implementation of receiver algorithms is essential. On the other hand, t…