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researcher

Andhi Janapsatya

1 paper hereh-index 11337 citations16 works total

Matching runs newest-first, so older work may not be attached to this profile yet.

author position
  • middle author1

Across the 1 of 1 paper where every author was matched, so the position is known.

fields
  • cs.AR1

identity via Semantic Scholar / OpenAlex

most citedDEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy

8 citations · 8 across the 1 of their papers we have counts for

collaborators

1 paper

cs.AR2015★ 8 cited

DEW: A Fast Level 1 Cache Simulation Approach for Embedded Processors with FIFO Replacement Policy

Mohammad Shihabul Haque, Jorgen Peddersen, Andhi Janapsatya +1

Increasing the speed of cache simulation to obtain hit/miss rates en- ables performance estimation, cache exploration for embedded sys- tems and energy estimation. Previously, such…

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Not affiliated with arXiv. Researcher data from Semantic Scholar (ODC-BY) and OpenAlex.