6 papers
LACE: Large Language Model Aided Multi-Agent Framework for Agile RISC-V Instruction Extension
Pingqing Zheng, Jiayin Qin, Fuqi Zhang +5
Domain-specific Instruction Set Architecture eXtensions (ISAX) are widely adopted in the RISC-V ecosystem to accelerate emerging workloads, but implementing and validating ISAXes a…
Bridging the Last Mile of Circuit Design: PostEDA-Bench, a Hierarchical Benchmark for PPA Convergence and DRC Fixing
Pengju Liu, Nuo Xu, Jinwei Tang +2
LLM-based agents are increasingly applied to the "last mile" of Electronic Design Automation (EDA): repairing residual sign-off Design Rule Check (DRC) violations and converging Po…
HDLxGraph: Bridging Large Language Models and HDL Repositories via HDL Graph Databases
Pingqing Zheng, Jiayin Qin, Fuqi Zhang +7
Retrieval Augmented Generation (RAG) is an essential agent for Large Language Model (LLM) aided Description Language (HDL) tasks, addressing the challenges of limited training data…
MAHL: Multi-Agent LLM-Guided Hierarchical Chiplet Design with Adaptive Debugging
Jinwei Tang, Jiayin Qin, Nuo Xu +5
As program workloads (e.g., AI) increase in size and algorithmic complexity, the primary challenge lies in their high dimensionality, encompassing computing cores, array sizes, and…
HiVeGen -- Hierarchical LLM-based Verilog Generation for Scalable Chip Design
Jinwei Tang, Jiayin Qin, Kiran Thorat +5
With Large Language Models (LLMs) recently demonstrating impressive proficiency in code generation, it is promising to extend their abilities to Hardware Description Language (HDL)…
TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs
Kiran Thorat, Amit Hasan, Caiwen Ding +1
Chip manufacturing is a complex process, and to achieve a faster time to market, an increasing number of untrusted third-party tools and designs from around the world are being uti…