collaborators

13 papers

cs.ET2026

A Unified Performance-Cost Landscape of Parallel p-bit Ising Machines Based on Update Dynamics

Naoya Onizawa, Takahiro Hanyu

Parallel p-bit Ising machines are a promising platform for fast and energy-efficient combinatorial optimization, but their scalability depends on update synchronization, hardware d…

cs.AR2026

Efficient CMOS Invertible Logic Using Stochastic Computing

Sean C. Smithson, Naoya Onizawa, Brett H. Meyer +2

Invertible logic can operate in one of two modes: 1) a forward mode, in which inputs are presented and a single, correct output is produced, and 2) a reverse mode, in which the out…

cs.CV2026

Efficient Few-Shot Learning for Edge AI via Knowledge Distillation on MobileViT

Shuhei Tsuyuki, Reda Bensaid, Jérémy Morlier +4

Efficient and adaptable deep learning models are an important area of deep learning research, driven by the need for highly efficient models on edge devices. Few-shot learning enab…

math.ST2026

Finite-Time Observability of Oscillatory Instabilities in Synchronous p-bit Dynamics

Naoya Onizawa, Shunsuke Koshita, Takahiro Hanyu

Synchronous update schemes in p-bit annealing offer a natural route to massive parallelism, but they can also induce period-2 oscillations that degrade optimization performance. In…

cs.AR2026

Energy-Efficient p-Bit-Based Fully-Connected Quantum-Inspired Simulated Annealer with Dual BRAM Architecture

Naoya Onizawa, Taiga Kubuta, Duckgyu Shin +1

Probabilistic bits (p-bits) offer an energy-efficient hardware abstraction for stochastic optimization; however, existing p-bit-based simulated annealing accelerators suffer from p…

cs.AR2026

Bit-Width-Aware Design Environment for Few-Shot Learning on Edge AI Hardware

R. Kanda, H. L. Blevec, N. Onizawa +3

In this study, we propose an implementation methodology of real-time few-shot learning on tiny FPGA SoCs such as the PYNQ-Z1 board with arbitrary fixed-point bit-widths. Tensil-bas…