9 citations · 18 across the 6 of their papers we have counts for
6 papers
Correcting Two Deletions and Insertions in Racetrack Memory
Alireza Vahid, Georgios Mappouras, Daniel J. Sorin +1
Racetrack memory is a non-volatile memory engineered to provide both high density and low latency, that is subject to synchronization or shift errors. This paper describes a fast c…
TREES: A CPU/GPU Task-Parallel Runtime with Explicit Epoch Synchronization
Blake A. Hechtman, Andrew D. Hilton, Daniel J. Sorin
We have developed a task-parallel runtime system, called TREES, that is designed for high performance on CPU/GPU platforms. On platforms with multiple CPUs, Cilk's "work-first" pri…
Profile-Driven Automated Mixed Precision
Ralph Nathan, Helia Naeimi, Daniel J. Sorin +1
We present a scheme to automatically set the precision of floating point variables in an application. We design a framework that profiles applications to measure undesirable numeri…
Evaluating Cache Coherent Shared Virtual Memory for Heterogeneous Multicore Chips
Blake A. Hechtman, Daniel J. Sorin
The trend in industry is towards heterogeneous multicore processors (HMCs), including chips with CPUs and massively-threaded throughput-oriented processors (MTTOPs) such as GPUs. A…
Recycled Error Bits: Energy-Efficient Architectural Support for Higher Precision Floating Point
Ralph Nathan, Bryan Anthonio, Shih-Lien Lu +3
In this work, we provide energy-efficient architectural support for floating point accuracy. Our goal is to provide accuracy that is far greater than that provided by the processor…
Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown
Jonathan R. Carter, Sule Ozev, Daniel J. Sorin
As device sizes shrink and current densities increase, the probability of device failures due to gate oxide breakdown (OBD) also increases. To provide designs that are tolerant to…