8 papers
A Full-Stack Performance Evaluation Infrastructure for 3D-DRAM-based LLM Accelerators
Cong Li, Chenhao Xue, Yi Ren +11
Large language models (LLMs) exhibit memory-intensive behavior during decoding, making it a key bottleneck in LLM inference. To accelerate decoding execution, hybrid-bonding-based…
CellE: Automated Standard Cell Library Extension via Equality Saturation
Yi Ren, Yukun Wang, Xiang Meng +6
Automated standard cell library extension is crucial for maximizing Quality of Results (QoR) in modern VLSI design. We introduce CellE, a novel framework that leverages formal meth…
Orthrus: Dual-Loop Automated Framework for System-Technology Co-Optimization
Yi Ren, Baokang Peng, Chenhao Xue +6
With the diminishing return from Moore's Law, system-technology co-optimization (STCO) has emerged as a promising approach to sustain the scaling trends in the VLSI industry. By br…
AC-Refiner: Efficient Arithmetic Circuit Optimization Using Conditional Diffusion Models
Chenhao Xue, Kezhi Li, Jiaxing Zhang +7
Arithmetic circuits, such as adders and multipliers, are fundamental components of digital systems, directly impacting the performance, power efficiency, and area footprint. Howeve…
MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs
Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen +19
The emergence of multimodal large language models (MLLMs) presents promising opportunities for automation and enhancement in Electronic Design Automation (EDA). However, comprehens…
ForgeEDA: A Comprehensive Multimodal Dataset for Advancing EDA
Zhengyuan Shi, Zeju Li, Chengyu Ma +19
We introduce ForgeEDA, an open-source comprehensive circuit dataset across various categories. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RT…