49 citations · 166 across the 18 of their papers we have counts for
3 papers · 1 filter
An Improved Scheme for Pre-computed Patterns in Core-based SoC Architecture
Elaheh Sadredini, Reza Rahimi, Paniz Foroutan +2
By advances in technology, integrated circuits have come to include more functionality and more complexity in a single chip. Although methods of testing have improved, but the incr…
Test Generation and Scheduling for a Hybrid BIST Considering Test Time and Power Constraint
Elaheh Sadredini, Mohammad Hashem Haghbayan, Mahmood Fathy +1
This paper presents a novel approach for test generation and test scheduling for multi-clock domain SoCs. A concurrent hybrid BIST architecture is proposed for testing cores. Furth…
An efficient parallel algorithm for computing determinant of non square matrices
Neda Abdollahi, Mohammad Jafari, Morteza Bayat +2
One of the most significant challenges in Computing Determinant of Rectangular Matrices is high time complexity of its algorithm. Among all definitions of determinant of rectangula…