2 citations · 3 across the 3 of their papers we have counts for
3 papers
cs.SE2025
Verifying Correctness of PLC Software during System Evolution using Model Containment Approach
Soumyadip Bandyopadhyay, Santonu Sarkar
Upgradation of Programmable Logic Controller (PLC) software is quite common to accommodate evolving industrial requirements. Verifying the correctness of such upgrades remains a si…
cs.SE2024★ 1 cited
Automated Control Logic Test Case Generation using Large Language Models
Heiko Koziolek, Virendra Ashiwal, Soumyadip Bandyopadhyay +1
Testing PLC and DCS control logic in industrial automation is laborious and challenging since appropriate test cases are often complex and difficult to formulate. Researchers have…
cs.LO2010★ 2 cited
Equivalence Checking in Embedded Systems Design Verification using PRES+ model
Soumyadip Bandyopadhyay
In this paper we focus on some aspects related to modeling and formal verification of embedded systems. Many models have been proposed to represent embedded systems. These models e…