44 citations · 46 across the 2 of their papers we have counts for
2 papers
cs.AR2022★ 44 cited
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
Licheng Guo, Yuze Chi, Jason Lau +9
In this paper, we propose TAPA, an end-to-end framework that compiles a C++ task-parallel dataflow program into a high-frequency FPGA accelerator. Compared to existing solutions, T…
cs.AR2022★ 2 cited
SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs
Xingyu Tian, Zhifan Ye, Alec Lu +3
Stencil computation is one of the fundamental computing patterns in many application domains such as scientific computing and image processing. While there are promising studies th…